Semiconductor integrated circuit device incorporating a data memory testing circuit
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United States of America Patent
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Dec 29, 2009
Grant Date -
Dec 15, 2005
app pub date -
Dec 16, 2004
filing date -
Jun 15, 2004
priority date (Note) -
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Abstract
A semiconductor integrated circuit device includes a data memory which stores write data, a holding circuit which holds the write data, a data write circuit which, during a write operation in a normal mode, supplies the write data held in the holding circuit to the data memory, and, during a write operation in a testing mode, inverts or does not invert the write data held in the holding circuit in accordance with an inversion control signal having a frequency substantially equal to a frequency of the write operation in the normal mode, and supplies the data to the data memory, and a data read circuit which outputs readout data from the data memory.
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