Methods of fabricating static random access memories (SRAMS) having vertical transistors
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United States of America Patent
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-
Oct 23, 2007
Grant Date -
Jul 5, 2007
app pub date -
Feb 13, 2007
filing date -
Jan 7, 2003
priority date (Note) -
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Abstract
Unit cells of a static random access memory (SRAM) are provided including an integrated circuit substrate and first and second active regions. The first active region is provided on the integrated circuit substrate and has a first portion and a second portion. The second portion is shorter than the first portion. The first portion has a first end and a second end and the second portion extends out from the first end of the first portion. The second active region is provided on the integrated circuit substrate. The second active region has a third portion and a fourth portion. The fourth portion is shorter than the third portion. The third portion is remote from the first portion of the first active region and has a first end and a second end. The fourth portion extends out from the second end of the third portion towards the first portion of the first active region and is remote from the second portion of the first active region. Methods of forming SRAM cells are also described.
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