Method for buffering clock skew by using a logical effort

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United States of America Patent

PATENT NO 8487684
APP PUB NO 20120169394A1
SERIAL NO

13155523

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Abstract

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A method buffers clock skew by using a logical effort, and is applicable to a clock tree that stays in a strong-inversion region, a moderate-inversion region, or a weak-inversion region. The method includes establishing in the clock tree a temperature sensor and a tunable-width buffer, and establishing width and temperature comparative lists according to a logical effort equation, for the tunable-width buffer to be individually applied to the strong-inversion region, the moderate-inversion region, and the weak-inversion region; selecting one from the width and temperature comparative lists that corresponds to one of the inversion regions in which the clock tree stays, enabling the temperature sensor to sense a temperature, and searching the selected width and temperature comparative list for a width that corresponds to the temperature sensed by the temperature sensor; and enabling the tunable-width buffer to perform a width modulation process according to the searched width.

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Patent Owner(s)

  • NATIONAL CHIAO TUNG UNIVERSITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Ming-Hung Hsinchu, TW 59 236
Hsieh, Chung-Ying Hsinchu, TW 2 5
Hwang, Wei Hsinchu, TW 93 2767

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