SRAM memory device with improved write operation and method thereof

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United States of America Patent

PATENT NO 7751229
APP PUB NO 20080159014A1
SERIAL NO

11617336

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Abstract

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A device, and a corresponding method of implementation, for SRAM memory information storage are provided. The device is powered by a supply voltage and includes an array of base cells organized in base columns, and at least one mirror column of at least one mirror cell liable to simulate the behavior of the cells in a base column. The device further includes Emulation means, in a mirror column, of the most restricting cell in a base column, Means for varying a mirror power supply voltage (VDDMMOCK) for the mirror column, and Means for copying the mirror power supply voltage in the emulated base column.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS FRANCE29 BOULEVARD ROMAIN ROLLAND MONTROUGE 92120

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barasinski, Sébastien Meylan, FR 5 6
Dray, Cyrille Grenoble, FR 37 231
Jacquet, Francois Froges, FR 32 111

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