Apparatuses and methods including memory cells, digit lines, and sense amplifiers
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United States of America Patent
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Sep 20, 2022
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N/A
app pub date -
Jul 29, 2020
filing date -
Jul 29, 2020
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Abstract
Apparatuses and methods including memory cells, digit lines, and sense amplifiers are described. An example apparatus includes a pair of digit lines including first and second digit lines, a sense amplifier coupled to the pair of digit lines and configured to amplify a voltage difference between the first and second digit lines when activated, and a plurality of memory cells. A memory cell of the plurality of memory cells includes a first node coupled to the first digit line and includes a second node coupled to the second digit line. The memory cell of the plurality of memory cells is configured to store a respective voltage and/or charge at a respective cell node and couple the respective voltage and/or charge to the first node when activated.
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