Erase system and method of nonvolatile memory device
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United States of America Patent
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Aug 30, 2016
Grant Date -
Sep 17, 2015
app pub date -
May 28, 2015
filing date -
Jul 12, 2011
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Abstract
An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing a read operation with a read voltage to word lines of the plurality of memory cells, and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage.
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