Pattern exposure apparatus for transferring circuit pattern on semiconductor wafer and pattern exposure method

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United States of America Patent

PATENT NO 6515733
SERIAL NO

09605897

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor wafer having an effective chip region set within an effective element region in which an element is formed and required for forming a single chip and an ineffective chip region which includes an ineffective element region in which no element is formed and required for forming a single chip. A degree of unevenness of a surface of the semiconductor wafer is measured at a plurality of sites within a predetermined region by an unevenness measuring section by applying light thereof, so that unevenness data are output. The predetermined region includes either or a part of both of the effective chip region and the ineffective chip region. A reference plane to which light is applied is determined by using only unevenness data of the effective chip region after unevenness data of the ineffective chip region are eliminated from the unevenness data. Inclination of the semiconductor wafer is controlled in accordance with the reference plane obtained through the calculation performed by the calculating section.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Udo, Yuso Chofu, JP 7 173

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