Ferroelectric resistor non-volatile memory array
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United States of America Patent
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Nov 16, 2004
Grant Date -
Jul 15, 2004
app pub date -
Jan 15, 2003
filing date -
Jan 15, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A ferroelectric thin film resistor memory array is formed on a substrate and includes plural memory cells arranged in an array of rows and columns; wherein each memory cell includes: a FE resistor having a pair of terminals, and a transistor associated with each resistor, wherein each transistor has a gate, a drain and a source, and wherein the drain of each transistor is electrically connected to one terminal of its associated resistor; a word line connected to the gate of each transistor in a row; a programming line connected to each memory cell in a column; and a bit line connected to each memory cell in a column.
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