Pooled DRAM system enabled by monolithic in-package optical I/O

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11233580
APP PUB NO 20210257021A1
SERIAL NO

17175678

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Abstract

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A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

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Patent Owner(s)

  • AYAR LABS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Meade, Roy Edward Lafayette, US 47 113
Saleh, Hugo Tuscaloosa, US 6 26
Stojanovic, Vladimir Berkeley, US 67 343
Sun, Chen Berkeley, US 360 1616
Wade, Mark Berkeley, US 55 212
Wuischpard, Charles Danville, US 4 7

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