Liquid crystal display panel with reduced parasitic impedance
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United States of America Patent
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-
Mar 4, 2008
Grant Date -
May 5, 2005
app pub date -
Jun 29, 2004
filing date -
Oct 30, 2003
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A liquid crystal display includes an array substrate, a data line, a gate line, a first and a second storage wiring, and a second substrate. The data line is disposed on the array substrate and intersects the gate line near a first pixel region. A second substrate, such as a color filter substrate, includes a second pixel region that corresponds to the first pixel region. The first storage wiring is positioned near an edge of the array substrate and the second storage wiring is disposed on the second substrate near an edge of the second substrate.
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