Integrated circuit memory devices with MRAM voltage divider strings therein
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United States of America Patent
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May 19, 2009
Grant Date -
May 3, 2007
app pub date -
Nov 1, 2005
filing date -
Nov 1, 2005
priority date (Note) -
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Abstract
A memory device and method of reading the memory device is disclosed. The memory device includes a first string of MRAM cells and a second string of MRAM cells. The first string of MRAM cells include a plurality of MRAM cells connected in series and the second string of MRAM cells include another plurality of MRAM cells connected in series. A common connection is controllably connectable to one end of the first string of MRAM cells, and to one end of the second string of MRAM cells.
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