Semiconductor memory device and method for producing the same

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United States of America Patent

PATENT NO 7622766
APP PUB NO 20070257306A1
SERIAL NO

11808228

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Abstract

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Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 μm, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishii, Tomoyuki Tokyo , JP 88 1534
Kurata, Hideaki Tokyo , JP 64 875
Osabe, Taro Tokyo , JP 26 566
Sakata, Takeshi Tokyo , JP 196 3440

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