Through silicon via lithographic alignment and registration
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United States of America Patent
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Oct 18, 2011
Grant Date -
Jul 21, 2011
app pub date -
Jan 20, 2010
filing date -
Jan 20, 2010
priority date (Note) -
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status (Latency Note)
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Abstract
A method of manufacturing an integrated circuit structure forms a first opening in a substrate and lines the first opening with a protective liner. The method deposits a material into the first opening and forms a protective material over the substrate. The protective material includes a process control mark and includes a second opening above, and aligned with, the first opening. The method removes the material from the first opening through the second opening in the protective material. The process control mark comprises a recess within the protective material that extends only partially through the protective material, such that portions of the substrate below the process control mark are not affected by the process of removing the material.
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