LDC implant for mirrorbit to improve Vt roll-off and form sharper junction

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7176113
SERIAL NO

10862636

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The present invention pertains to implementing a lightly doped channel (LDC) implant in fashioning a memory device to improve Vt roll-off, among other things. The lightly doped channel helps to preserve channel integrity such that a threshold voltage (Vt) can be maintained at a relatively stable level and thereby mitigate Vt roll-off. The LDC also facilitates a reduction in buried bitline width and thus allows the bitlines to be brought closer together. As a result more devices can be formed or 'packed' within the same or a smaller area.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • CYPRESS SEMICONDUCTOR CORPORATION

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Haddad, Sameer San Jose, CA 64 558
Kamal, Tazrien San Jose, CA 42 1019
Qian, Weidong Sunnyvale, CA 17 399
Ramsbey, Mark Sunnyvale, CA 49 567
Randolph, Mark San Jose, CA 59 1522
Wong, Nga-Ching Alan San Jose, CA 2 21

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation