Method of fabricating a semiconductive device
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United States of America Patent
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-
Sep 18, 2001
Grant Date -
N/A
app pub date -
May 21, 1999
filing date -
May 18, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method of fabricating a semiconductor device is described in which an insulation layer is formed over the gate electrode and the substrate. This insulation layer is anisotropically etched away except for a portion surrounding the sidewall of the gate electrode to form a spacer. The tip of the spacer is at the same height as the upper surface of the liner layer and is lower than the upper surface of the gate electrode, therefore, resulting in an increase of the exposed area of the gate electrode surface.
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