Tunable input trap circuit and image trap circuit

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United States of America Patent

PATENT NO 6472956
APP PUB NO 20020130735A1
SERIAL NO

09576817

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An input trap circuit removes a predetermined frequency component included in an input signal and then outputs the input signal to a circuit at a later stage. The input trap circuit is provided with: a parallel oscillation circuit in which a pair of variable capacitance diodes are connected in series such that cathodes thereof are connected to each other at a junction portion and in which an inductance is connected in parallel to the variable capacitance diodes between anodes of the variable capacitance diodes at both ends thereof; a voltage applying device for applying a voltage to the junction portion so as to vary capacitance values of the variable capacitance diodes on the basis of reverse voltage characteristics of the variable capacitance diodes respectively; and a variable capacitor element connected between the junction portion and a ground.

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Patent Owner(s)

  • PIONEER CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kosuga, Tadashi Kawagoe, JP 30 265

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