Importance

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Abstract

Flash memory device capable of interpreting a write cycle and one or more subsequent write cycles as a generic command that includes one or more specific flash memory commands. The flash memory device includes a state machine capable of identifying the generic command, writing the specific flash memory commands to a buffer, and sequentially retrieving, interpreting and executing the buffered flash memory commands. The state machine can be configured as a microcontroller executing a state machine algorithm, and can be reprogrammed to correct design errors or to add new functionality to the flash memory device. The state machine algorithm can be stored in the flash memory device, and updated to interpret the same write cycle data in different ways. Accordingly, new functionality can be developed for the state machine long after its silicon has been designed and developed.

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First Claim