Data processing system in which modules logically "OR" number sequences onto control lines to obtain the use of a time shared bus
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United States of America Patent
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Dec 13, 1988
Grant Date -
N/A
app pub date -
Dec 2, 1985
filing date -
Dec 2, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A data processing system includes a plurality of data processing modules coupled to a bus and to a set of control lines. These modules request the use of the bus by sending respective sequences of at least two binary numbers during successive cycles on the control lines in synchronization with each other. On the control lines the numbers are logically ORed together. Each module terminates the sending of its numbers if, during any one of the successive cycles, the logical OR is greater than twice the number which the module itself is sending. A module uses the bus only if, during each of the successive cycles, the logical OR does not exceed the number which the module itself sends.
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