Importance

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Abstract

A structure of a multi chip module package having stacked chips, having at least a substrate, a main chip, a plurality of chip sets, a plurality of spacers, a plurality of glue layers, a plurality of wires, and a mold compound. The substrate has a front surface and a back surface opposite to the front surface. A plurality of chips are stacked in the form of laminate on the front surface of the substrate to form a plurality of chip sets, which are located next to the main chip. A plurality of spacers are arranged between each two adjacent chips. The connection between the spacers, the main chip, the chips, and the substrate are achieved by a plurality of glue layers. A plurality of wires are used to electrically connect the chips and the main chip to the substrate. Finally, the front surface of the substrate, the main chip, the spacers, the chips, and the glue layers are encapsulated with a mold compound to accomplish the package.

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First Claim