Method for PFET enhancement
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United States of America Patent
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Jul 27, 2010
Grant Date -
Jul 8, 2010
app pub date -
Jan 7, 2009
filing date -
Jan 7, 2009
priority date (Note) -
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Abstract
A semiconductor process and apparatus includes forming PMOS transistors (90) with enhanced hole mobility in the channel region by forming a hydrogen-rich silicon nitride layer (91, 136) on or adjacent to sidewalls of the PMOS gate structure as either a hydrogen-rich implant sidewall spacer (91) or as a post-silicide hydrogen-rich implant sidewall spacer (136), where the hydrogen-rich dielectric layer acts as a hydrogen source for passivating channel surface defectivity under the PMOS gate structure.
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