Signal timing adjustment circuit with external resistor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 19, 2005
Grant Date -
Jan 15, 2004
app pub date -
Jun 27, 2003
filing date -
Jul 12, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor device includes an external resistor for establishing a delay of a signal relative to another signal in the device. The resistor may be external to a buffer, such as a zero-delay buffer, that receives an input signal generates one or more output signals that relate to the input signal. The delay may be introduced either before or after the buffer.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully