Warpage resistant semiconductor package and method for manufacturing the same
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United States of America Patent
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Sep 14, 2010
Grant Date -
Jun 4, 2009
app pub date -
Mar 7, 2008
filing date -
Nov 30, 2007
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor package and a method for manufacturing the same is provided for minimizing or preventing warpage and twisting of semiconductor chip bodies as a result of thinning them during grinding. The semiconductor package includes a semiconductor chip body and a substrate. The semiconductor chip body has a first surface, a second surface facing away from the first surface, through-electrodes which pass through the semiconductor chip body and project from the second surface, and a warpage prevention part which projects in the shape of a fence along an edge of the second surface. The substrate has a substrate body and connection pads which are formed on an upper surface of the substrate body, facing the second surface, and which are connected with the projecting through-electrodes.
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