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Abstract

A circuit arrangement, in particular in DECT systems, for the regeneration of an input signal containing characteristic digital data sequences with N>1 allowed discrete values per digital position, having conversion means that produce a regenerated digital output signal from the comparison of the input signal with at least N-1 reference level, at least one integration element for obtaining the at least one N-1 reference level by integration of the segments of the input signal consisting of the characteristic data sequences, a drivable switching means for the activation or, respectively, deactivation of the integration of the input signal, a checking means that respectively activates the integration process by driving the switching apparatus at the beginning of a characteristic data sequence in the signal curve and, when the end of the data sequence is recognized, deactivates it again in order to avoid a shifting of the at least N-1 reference levels, as well as at least one delay element via which the supplying of the input signal to the at least one integration element takes place with a delay in relation to the supplying of the input signal to the conversion means, whereby a level-falsifying integration beyond the end of a characteristic data sequence is prevented.

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