Method of manufacturing a semiconductor device

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United States of America Patent

PATENT NO 7816736
SERIAL NO

11978605

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Abstract

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There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.

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Patent Owner(s)

  • SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yamazaki, Shunpei Setagaya, JP 7291 226813

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