Bit line control circuit for a content addressable memory
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United States of America Patent
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Jun 14, 2005
Grant Date -
N/A
app pub date -
Mar 21, 2003
filing date -
Mar 21, 2003
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A bit line control circuit is coupled between a bit line of an associated Content Addressable Memory (CAM). Array and a supply voltage. The bit line control circuit adjusts the charge current for the bit line in response to a bit line control signal. For some embodiments, the bit line control circuit includes a dynamic component and a static component to control the bit line.
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