Method for fabricating a semiconductor component including a high capacitance per unit area capacitor

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United States of America Patent

PATENT NO 7439127
APP PUB NO 20070249166A1
SERIAL NO

11409362

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method is provided for fabricating a semiconductor component that includes a capacitor having a high capacitance per unit area. The component is formed in and on a semiconductor on insulator (SOI) substrate having a first semiconductor layer, a layer of insulator on the first semiconductor layer, and a second semiconductor layer overlying the layer of insulator. The method comprises forming a first capacitor electrode in the first semiconductor layer and depositing a dielectric layer comprising Ba.sub.1-xCa.sub.xTi.sub.1-yZr.sub.yO.sub.3 overlying the first capacitor electrode. A conductive material is deposited and patterned to form a second capacitor electrode overlying the dielectric layer, thus forming a capacitor having a high dielectric constant dielectric. An MOS transistor in then formed in a portion of the second semiconductor layer, the MOS transistor, and especially the gate dielectric of the MOS transistor, formed independently of forming the capacitor and electrically isolated from the capacitor.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pelella, Mario M Mountain View, CA 39 403

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