Circular buffer addressing
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United States of America Patent
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Jan 6, 2009
Grant Date -
N/A
app pub date -
Jul 16, 2004
filing date -
Jan 6, 2004
priority date (Note) -
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Abstract
Methods and apparatus are provided for performing circular buffer addressing. Upper boundaries, lower boundaries, circular buffer lengths, addresses, and offsets are set to allow circular buffer access efficiency. An addition/subtraction unit is provided to simplify implementation. Comparators are rearranged and in some instances replaced with combined adder/comparator logic units. The additional logic units and the rearrangement allow efficient implementation of circular buffer addressing, particularly on programmable chips.
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