Data erasure in memory sub-systems

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United States of America Patent

PATENT NO 11775198
SERIAL NO

17529908

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Abstract

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Various examples are directed to memory systems comprising a component and a processing device. The memory system may comprise a plurality of blocks. A first portion of the plurality of blocks may be retired and a second portion of the plurality of blocks may be unretired. The processing device receives a sanitize operation for the plurality of blocks. The processing device initiates a first erase cycle at a first retired block of the plurality of blocks. The processing device determines that the first erase cycle was not successful and sets an erase indicator to false.

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Patent Owner(s)

  • MICRON TECHNOLOGY INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brandt, Kevin R Boise, US 42 135
Van, Eaton Thomas Cougar Boise, US 4 11

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