Semiconductor memory device and method for operating the same
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United States of America Patent
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Dec 7, 2010
Grant Date -
May 7, 2009
app pub date -
Dec 31, 2007
filing date -
Nov 2, 2007
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Abstract
Semiconductor memory device and method for operating the same includes a phase detection unit configured to compare a phase of a first reference clock and a phase of a second divided reference clock to output a comparison result signal and a phase control and division unit configured to generate the second divided reference clock by dividing a second reference clock by a predetermined ratio according to the comparison result signal outputted from the phase detection unit and adjusting a phase of the second reference clock.
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