Semiconductor package and method

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11948890
SERIAL NO

17340556

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Abstract

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In an embodiment, a device includes: an integrated circuit die; a through via adjacent the integrated circuit die; a molding compound encapsulating the integrated circuit die and the through via; and a redistribution structure including: a first conductive via extending through a first dielectric layer, the first conductive via electrically connected to the integrated circuit die, the first dielectric layer being over the integrated circuit die, the through via, and the molding compound; and a first conductive line over the first dielectric layer and the first conductive via, the first conductive via extending into the first conductive line.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ho, Ming-Che Tainan, TW 123 1097
Kuo, Hung-Jui Hsinchu, TW 370 1608
Tseng, Shih-Hao Hsinchu, TW 13 150

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