Flexible scan architecture
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United States of America Patent
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May 8, 2007
Grant Date -
Dec 30, 2004
app pub date -
Jun 26, 2003
filing date -
Jun 26, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
A testing architecture for testing a complex integrated circuit in which each functional unit may be tested independently of the others. Embodiments of the invention allow testing of functional units to take place at slower or faster clock speeds than other portions of the processor without incurring delay or other adverse timing effects.
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