Electrostatic discharge protection circuit device
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United States of America Patent
Stats
-
Aug 5, 2003
Grant Date -
Nov 21, 2002
app pub date -
May 18, 2001
filing date -
May 18, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A structure of an ESD protection circuit device located under a pad, protecting an internal circuit and a method of manufacturing the same are disclosed. The ESD protection circuit device having a pad window, located under a pad, includes a semiconductor substrate having a P-well and an N well. The P-well and the N-well have an interface. A predetermined area, pad window is selected in the substrate. A first STI structure, a second STI structure and a third STI structure are formed in the substrate within the pad window. N-type doped regions are formed P-well and in the N-well. First p-type doped regions are formed in the P-well and in the N-well and second p-type doped regions are formed in the P-well and in the N-well. A first zener diode is formed in the N-well and a second zener diode is formed in the P-well.
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