Systems and methods for mapping and multiplexing wider clock tolerance signals in optical transport network transponders and multiplexers
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United States of America Patent
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Oct 13, 2009
Grant Date -
Oct 30, 2008
app pub date -
Apr 30, 2007
filing date -
Apr 30, 2007
priority date (Note) -
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Abstract
The present invention provides systems and methods for mapping and multiplexing wider clock tolerance signals in Optical Transport Network (OTN) transponders and multiplexers. In one exemplary embodiment, the present invention allows wide tolerance signals, such as a 10 GbE with a ±100 PPM clock tolerance, to be 100% transparently mapped asynchronously into OTU2-LAN rate transport signals. In another exemplary embodiment, the present invention allows wide tolerance signals, such as a 10 GbE with a ±100 PPM clock tolerance, to be 100% transparently multiplexed asynchronously in to OTU3-LAN rate transport signals. The present invention utilizes extra Negative Justification Opportunities (NJO) in either unused OPUk overhead or in OPUk payload area and Positive Justification Opportunities (PJO) in OPUk payload area. Advantageously, the extra NJO and PJO provide additional bandwidth for client data rate offsets beyond OTN specifications.
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