Method and system for conducting a low-power design exploration

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United States of America Patent

PATENT NO 7673276
APP PUB NO 20080126999A1
SERIAL NO

11588927

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Abstract

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Method and system for conducting low-power design explorations are disclosed. The method includes receiving an RTL netlist of a circuit design, creating one or more power requirement files, wherein each power requirement file comprises power commands corresponding to the RTL netlist, generating one or more low-power RTL netlists using the corresponding one or more power requirement files and the RTL netlist, and conducting low-power design explorations using the one or more low-power RTL netlists.

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Patent Owner(s)

  • CADENCE DESIGN SYSTEMS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wang, Qi San Jose, US 695 4626

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