Importance

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Abstract

A test apparatus that tests a device under test is provided. The test apparatus includes: a control processor that executes a test program to test the device under test; a test unit connected to the device under test that tests the device under test according to an instruction by the control processor; and a relay section connected to the control processor and the test unit that relays a control instruction transmitted from the control processor to the test unit. The relay section includes: a buffer section that buffers the control instruction to be written to the address assigned from the control processor to the test unit; a timing storage section that stores a timing at which the control instruction received from the control processor should be transmitted to the test unit; and a buffer control unit that transmits the control instruction buffered in the buffer section to the test unit in response to that the timing stored in the timing storage section comes.

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First Claim