Transistor device configurations for high voltage applications and improved device performance
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United States of America Patent
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Sep 11, 2001
Issued Date -
N/A
app pub date -
Sep 13, 2000
filing date -
Jun 30, 1998
priority date (Note) -
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Abstract
A circuit device that includes a gate overlying an area of a semiconductor substrate, a well formed in the substrate proximate a first edge of the gate and doped with a first concentration of a first dopant, a channel region doped with a first concentration of a second dopant underlying a portion of the gate adjacent the well, a non-conducting region formed in the first portion of the well, and a contact to the second portion of the well distal from the first edge of the gate.
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