Method of manufacturing nonvolatile semiconductor memory with backing wirings
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United States of America Patent
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Aug 26, 2014
Grant Date -
Apr 5, 2012
app pub date -
Dec 13, 2011
filing date -
Jun 19, 2006
priority date (Note) -
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Abstract
A nonvolatile semiconductor memory comprises a first memory cell transistor, a second memory cell transistor, a connection layer, protrusion portions and a contact portion. The first memory cell transistor comprises a first gate electrode formed above a first channel region, and a second gate electrode formed on a side of the first gate electrode through an insulating film. The second memory cell transistor comprises a third gate electrode formed above a second channel region, and a fourth gate electrode formed on a side of the third gate electrode through an insulating film and facing the second gate electrode. The connection layer connects the second gate electrode and the fourth gate electrode. The protrusion portions are formed of a material different than that of the second and fourth gate electrodes, and are formed on both ends of the connection layer. The contact portion is formed on the connection layer.
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