Integrated circuit with anti-punch through control
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United States of America
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Apr 26, 2022
Grant Date -
Jun 24, 2021
app pub date -
Dec 19, 2019
filing date -
Dec 19, 2019
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An integrated circuit die includes a FinFET transistor. The FinFET transistor includes an anti-punch through region below a channel region. Undesirable dopants are removed from the anti-punch through region during formation of the source and drain regions. When source and drain recesses are formed, a layer of dielectric material is deposited in the recesses. An annealing process is then performed. Undesirable dopants diffuse from the anti-punch through region into the layer of dielectric material during the annealing process. The layer of dielectric material is then removed. The source and drain regions are then formed by depositing semiconductor material in the recesses.
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