Importance

Loading Importance Indicators...

Abstract

The present invention is directed to systems and method of controlling clock signals during scan testing integrated circuits. The methods and systems provide efficient at-speed scan testing while minimizing the external pins on an integrated circuit dedicated to scan testing clock sources. A clock control circuit is disclosed that includes a scan test control module for permitting a clock signal to be transmitted and a scan test clock decision module for determining whether a clock signal should be permitted to be transmitted. An integrated circuit is disclosed that includes a set of clock control circuits. Embodiments of a scan test control module are provided that can process decoder inputs, ATPG inputs or both. A method is provided that can be used, for example, by an ATPG tool to efficiently provided at-speed scan testing while minimizing external pins dedicated to scan testing clock sources.

Loading the Abstract Image...

First Claim