Method of forming a low resistance semiconductor contact and structure therefor

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Jun 15, 2010
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Sep 23, 2005
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Sep 23, 2005

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Abstract

In one embodiment, silicide layers are formed on two oppositely doped adjacent semiconductor regions. A conductor material is formed electrically contacting both of the two silicides.

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SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

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H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

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Inventor Name	Address	# of filed Patents	Total Citations
Grivna, Gordon M	Mesa, US	225	2583
Venkatraman, Prasad	Gilbert, US	97	745

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Method of forming a low resistance semiconductor contact and structure therefor

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United States of America Patent

11232757

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US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
June 15, 2010	US,7736984,B2 US7736984B2	GRANTED PATENT AS SECOND PUBLICATION
March 29, 2007	US,20070072416,A1 US20070072416A1	FIRST PUBLISHED PATENT APPLICATION

PATENT NO	7736984
SERIAL NO	11232757
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11232757

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