Importance

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Abstract

In order to improve the robustness against electrostatic discharge, when power source terminal and ground terminal are open, of a semiconductor device having a first, a second and a third inverter that are connected in a cascade arrangement, the semiconductor device is provided not only with a first input protection circuit for guiding positive electrostatic discharges, that are applied from outside to a signal input terminal, to a power source line, and a second input protection circuit for guiding negative electrostatic discharges, that are applied from outside to the signal input terminal, to a ground line, but also an internal protection circuit for guiding electrostatic discharges that have been guided by the first input protection circuit to the power source line and flow from a P-channel MOS transistor in the second inverter towards the third inverter, to the ground line.

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First Claim