Semiconductor constructions
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United States of America Patent
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Sep 7, 2010
Grant Date -
Jul 2, 2009
app pub date -
Mar 6, 2009
filing date -
Aug 21, 2006
priority date (Note) -
In Force
status (Latency Note)
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Abstract
In some embodiments, an opening is formed through a first material, and sidewall topography of the opening is utilized to form a pair of separate anisotropically etched spacers. The spacers are utilized to pattern lines in material underlying the spacers. Some embodiments include constructions having one or more openings which contain steep sidewalls joining to one another at shallow sidewall regions. The constructions may also contain lines along and directly against the steep sidewalls, and spaced from one another by gaps along the shallow sidewall regions.
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