Method of producing an etch pattern

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United States of America Patent

PATENT NO 6420270
SERIAL NO

09645906

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A masking and etching technique during the formation of a memory cell capacitor which utilizes an etching technique to utilize a maximum surface area over the memory cell and to form thin spacers to pattern separation walls between capacitors. This technique results in efficient space utilization which, in turn, results in an increase in the surface area of the capacitor for an increased memory cell capacitance.

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Patent Owner(s)

  • CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Clampitt, Darwin A Boise, ID 77 540

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