High capacitive load and noise tolerant system and method for controlling the drive strength of output drivers in integrated circuit devices
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United States of America Patent
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Aug 24, 2010
Grant Date -
Mar 11, 2010
app pub date -
Sep 9, 2008
filing date -
Sep 9, 2008
priority date (Note) -
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Abstract
An output driver calibration circuit includes a programmable drive strength output pullup driver including a strongest transistor and a number of other transistors, a programmable drive strength output pulldown driver including a strongest transistor and a number of other transistors, and a calibration circuit for generating a number of control signals for controlling the transistors in the output pullup driver and the transistors in the output pulldown driver, wherein the control signals are generated simultaneously, except for two the strongest driver transistors.
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