Apparatus and method for executing an instruction with a register bit mask for transferring data between a plurality of registers and memory inside a processor

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United States of America Patent

PATENT NO 6820191
APP PUB NO 20020069350A1
SERIAL NO

09750465

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An apparatus and method for executing an instruction with a register bit mask for transferring data between a plurality of registers and memory inside a processor is provided. The method includes adding the N bits in the N-bit decode information together to form an initial count value, and generating a plurality of register identification (ID) numbers equivalent in number to the initial count value. The register ID numbers correspond to the positions in the N-bit decode information that has a bit value `1`. According to the register ID number, a link is created between the plurality of registers corresponding to the register ID numbers and a memory unit so that the memory unit and the registers are free to exchange stored data.

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Patent Owner(s)

  • FARADAY TECHNOLOGY CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chi, Shyh-An Hsinchu, TW 41 430
Guey, Calvin Taipei Hsien, TW 5 117
Wang, Yu-Min Taichung, TW 38 76

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