Memory area protection system and methods

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9406388
APP PUB NO 20100138623A1
SERIAL NO

11795358

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Abstract

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In one embodiment, a non-volatile memory device includes a plurality of protection bits denoting that an area of memory in the device must be protected from being erased or programmed. The memory device further includes a majority logic circuit for determining the logic state of the majority of the plurality of protection bits. Another embodiment includes a pattern generator for generating the logic levels to be stored in the plurality of protection bits.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
De, Santis Luca Avezzano, IT 87 521
Gallese, Maria Luisa Avezzano, IT 5 20
Imondi, Giuliano Gennaro Rieti, IT 11 39

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