Importance

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Abstract

A data transmission apparatus including a plurality of buffers for sequentially receiving individual data to be stored in a plurality of memories at every predetermine period and storing supplied data for a predetermined period, a plurality of latch circuits for receiving storage address data of data shifted at every predetermined period and holding supplied storage address data for a predetermined holding period from a time point at which storage address data are supplied, a write timing generator for write-activating a plurality of memories at its memory in which data held in each buffer is to be stored, and a read timing generator for read-activating a memory corresponding to a latch circuit to which storage address data is supplied after a predetermined delay time since storage address data was supplied.

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First Claim