High speed early/late discrimination systems and methods for clock and data recovery receivers
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United States of America Patent
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May 20, 2008
Grant Date -
Jul 28, 2005
app pub date -
Jan 28, 2004
filing date -
Jan 28, 2004
priority date (Note) -
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Abstract
The present invention facilitates clock and data recovery for serial data streams by providing a mechanism that can be employed to detect and adjust operation and timing of clocks. The invention employs a differential analog circuit, using current steering logic, to process center and edge samples and identify an average operation of the clocks. The circuit can identify transitions between adjacent center/edge data samples and determine whether an identified transition is early or late for each bit in a set of consecutive bits of a received serial data stream.
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