Process for manufacturing integrated resistive elements with silicidation protection
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United States of America Patent
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Jul 28, 2009
Grant Date -
Jun 29, 2006
app pub date -
Jan 30, 2006
filing date -
Sep 30, 2002
priority date (Note) -
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Abstract
In a process for the fabrication of integrated resistive elements with protection from silicidation, at least one active area (15) is delimited in a semiconductor wafer (10). At least one resistive region (21) having a predetermined resistivity is then formed in the active area (15). Prior to forming the resistive region (21), however, a delimitation structure (20) for delimiting the resistive region (21) is obtained on top of the active area (15). Subsequently, protective elements (25) are obtained which extend within the delimitation structure (20) and coat the resistive region (21).
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