Bitcell architecture with time-multiplexed ports

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United States of America

PATENT NO 11967365
APP PUB NO 20200395064A1
SERIAL NO

16898401

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Abstract

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Various implementations described herein are related to a device having a memory cell with logic that is configured to store data and passgates that are configured to access the data stored in the logic. The device may include a first number of input-output ports that are time-multiplexed with the passgates so as to increase the first number of input-output ports to a second number of input-output ports that is greater than the first number of input-output ports.

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Patent Owner(s)

  • ARM LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anantuni, Venu Austin, US 1 0
Chong, Yew Keong Austin, US 91 281
Kinkade, Martin Jay Austin, US 15 89
Maiti, Bikas Austin, US 26 1068

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